This invention relates generally to the field of waveform generation. More specifically, the invention relates to a method and apparatus for generating an arbitrary waveform using a free-running ring oscillator.
There are many instances when it is desirable to inexpensively divide units of time or units of distance into smaller units. For example, in a range detector, the time elapsed between the outgoing signal and the incoming signal may be very short, on the order of nanoseconds, and the use of a standard reference clock to count the time elapsed would yield an inaccurate count resulting in inaccurate distance calculations.
In another example, in laser printers, it is often desirable to provide a transition from white to black (or vice versa) at various distances within a given line cell for high resolution. See U.S. Pat. No. 5,109,283 incorporated herein by this reference. A white-to-black or black-to-white signal, however, clocked at the printer""s pixel clock rate of 10 MHz, is not resolved finely enough at the printer""s laser diode to accurately control print transitions within a given print cell. Faster clocks are too expensive and/or not available to reference the print transitions at the high temporal resolution (e.g., one nanosecond corresponding to print cell distances on the order of microns) required for high resolution graphic images.
One solution to the above problems is to use a device incorporating a free-running ring oscillator (also referred to interchangeably as a loop oscillator). U.S. Pat. Nos. 5,793,709 and 5,903,522 describe such solutions, and are herein incorporated by this reference. However, as signal requirements for applications in the fields of CD-RW, DVD, communications and radar demand transition edges of higher frequency and precision, limitations are realized. Differences in circuit conductive path lengths and implementation hardware become noticeable. An algebra clock based on the frequency of the reference clock limits the speed of the calculations made by the algebra circuitry. External circuitry calculating the speed of the free-running loop oscillator (xe2x80x9cloopxe2x80x9d) also limits the speed of the calculations made by the algebra circuitry. Devices using the output may not tolerate a sudden, unpredictable transition in the output signal when a synchronization signal is used.
The present invention addresses these needs.
It is therefore an object of this invention to compensate for different implementation hardware and unequal path lengths. Another object of this invention is to generate an internal clock for the transition edge calculations based on the output signal being generated, which can be substantially faster than the reference clock. The invention also includes a watchdog for supplying the internal clock should the transition edge calculations become erroneous. Another object of this invention is to internally calculate the average loop speed in order to increase the overall allowable frequency of the calculation. The circuitry also calculates the transition position in the loop based on the average loop speed to improve accuracy. Another object of this invention is to generate an output that seamlessly joins an updated output waveform with a previous output waveform upon an intentional change in the output phase. Applications in the fields of CD-RW, DVD, communications and radar require faster and more precise edge transitions.
This invention relates to a method and apparatus for generating an arbitrary waveform. In one aspect, the invention relates to a waveform generator for generating an arbitrary waveform. The waveform generator includes a free-running ring oscillator, an algebra module, a switching module and an output module. The free-running ring oscillator includes a plurality of delay elements connected in a loop and a plurality of taps disposed between the delay elements, with each tap providing a uniquely phased, oscillating transition signal. The algebra module includes an algebra data input port, a clock input port and an algebra data output port. The algebra module generates a signal at the algebra data output port indicating a first rising edge of the arbitrary waveform in response to a signal received at the algebra data input port. The switching module includes a switch input port in electrical communication with the algebra data output port, a plurality of switch tap input ports in electrical communication with the free-running ring oscillator taps and switch output port. At the switch output port, the switch module provides a first transition signal selected from one of the plurality of free-running ring oscillator taps in response to the signal indicative of a first rising edge received at the switch input port. The output module includes a transition signal input port in electrical communication with the switch output port, a window input port in electrical communication with the algebra data output port and a waveform output port in electrical communication with the clock input port of the algebra module. The output module creates an arbitrary waveform at the waveform output port in response to the first transition signal received at the transition signal input port of the output module and the signal of a first rising edge received at the window input port.
In one embodiment, the arbitrary waveform generator includes a loop averaging module, which includes a reference clock input port and a tap input port, which is electrically connected to the plurality of taps in the free-running ring oscillator. In response to a reference clock signal received at the reference clock input port, the loop averaging module counts the number of tap transitions occurring between edges of the reference clock signal and calculates an average loop speed in response to the count. The loop averaging module can further calculate the instantaneous phase of the ring oscillator in response to the calculated average loop speed and a plurality of captured states of the loop.
In another embodiment, the arbitrary waveform generator includes a fine delay module. The fine delay module includes a signal input port in electrical communication with the switch output port, a selection input port in electrical communication with the algebra data output port of the algebra module and a fine-delay output port in electrical communication with the input port of the output module. The fine delay module delays the propagation of the first transition signal from the switch output port of the switching module to the input port of the output module in response to the signal of a first rising edge received at the selection input port. The selection input port of the output module is in electrical communication with the switch output port of the switching module through the fine delay module.
In another embodiment, the algebra module includes a synchronization input port. In response to signals received at the algebra data input port and the synchronization input port, the algebra module, at the algebra data output port, creates a signal of a first rising edge within the arbitrary waveform. The algebra module then generates a signal of a first rising edge that results in a seamless incorporation of the first rising edge in the arbitrary waveform generator.
In another embodiment, one of the delay elements is an inverting delay element, with each delay element being identically loaded. In another embodiment, at least one delay element includes a test switch module. The test switch module has a test control input port and a test data input port. In response to a signal received at the test control input port, the delay element, at the corresponding tap, creates a signal identical to the signal received at the test data input port.
In another embodiment, the arbitrary waveform generator also includes a compensation module. The compensation module includes a data output port in electrical communication with the algebra module and a compensation input port to receive a signal indicative of a frequency altering parameter of a source of a reference clock. The compensation module estimates a variation in frequency of the reference clock associated with the frequency altering parameter of the source of the reference clock. The compensation module then creates a correction signal at the compensation output port in response to this frequency variation. In another embodiment, the frequency altering parameter is the temperature of the source of the reference clock. In another embodiment, the frequency altering parameter is the age of the source of the reference clock.
In another embodiment, the algebra module is made to create a second signal of the first falling edge within the arbitrary waveform at the algebra data output port in response to a signal received at the algebra input port. In another embodiment, the output module is made to create a catch-up signal of an erroneous signal of a first rising edge received at the window input port. In another embodiment, the arbitrary waveform generator is implemented within a CMOS integrated circuit.
In another embodiment, the arbitrary waveform generator includes an amplifier and a loop-speed compensator circuit. The amplifier feeds forward at least one component of power-supply noise from a power supply coupled to the ring oscillator and the loop-speed compensator circuit is in electrical communication with the amplifier. In one embodiment, the loop-speed compensator circuit is in electrical communication with the loop averaging module to adjust the calculated average loop speed in response to the amplified noise. In another embodiment, the loop-speed compensator circuit is in electrical communication with the algebra module to adjust the calculated average loop speed in response to the amplified noise.
In another embodiment, the arbitrary waveform generator includes a plurality of capacitive elements each of which is in electrical communication with a respective one of a plurality of signal paths. Each capacitive element has a respective predetermined capacitance to create a respective predetermined time delay in the propagation of a transition signal through the respective signal path such that the propagation time for a transition on a first signal path is substantially equal to the propagation time for a transition on a second signal path.
In another embodiment, each capacitive element of the plurality of capacitive elements has a value less than approximately 50 femtofarads. In a further embodiment, each of the plurality of signal paths is in electrical communication with a first capacitive element and a second capacitive element. In a further embodiment, the first and second capacitive elements have different sensitivities to temperature, process and supply voltage.
In another aspect, the invention relates to a method for creating an arbitrary waveform. The method of creating an arbitrary waveform includes generating a continuous sequence of transitions in a loop of delay elements, counting the transitions occurring at one of the delay elements in the loop, determining a desired first rising edge time and a first falling edge time, selecting a first transition in the continuous sequence of transitions in response to the desired first rising edge based on the counted transitions and an internal clock, selecting a second transition in the continuous sequence of transitions in response to the desired first falling edge time based on the counted transitions and an internal clock, generating an output signal using the first and second selected transitions, and generating the internal clock signal based on the output signal.
In one embodiment, the method of generating an output signal includes using each of the transitions of the continuous sequence of transitions to generate the output signal in response to the desired first rising edge time occurring in the past.
In another embodiment, the method includes the calculation of the average rate of transitions at one of the delay elements with respect to an input reference clock.
In another embodiment, the method includes the calculation of the instantaneous phase within the loop of delay elements in response to the calculated average rate of transitions and a plurality of captured states of the loop of delay elements.
In another embodiment, the method includes adding to the selected transition one of a plurality of propagation delays, where the difference between two of the plurality of propagation delays is less than the average propagation time of a transition through a delay element in the loop of delay elements.
In another embodiment, the method includes receiving an external synchronization signal and modifying the selection of the first and second transitions in response to the received synchronization signal. In a further embodiment, the modification process includes adjusting the selection of the first transition so there is a seamless incorporation of the first rising edge in the output signal to create the arbitrary waveform.
In another embodiment, each transition has a polarity. In a further embodiment, generating a continuous sequence of transitions includes inverting the polarity of a transition with a delay element. In a further embodiment, the generation of a continuous sequence of transitions provides an identical load to each of the delay elements.
In another embodiment, the method includes receiving a signal indicative of a frequency altering parameter of a source of a reference clock, determining any variation of the reference clock due to the frequency altering and altering the selection of the first transition in response to the determined variation. In another embodiment, the frequency altering parameter is a temperature of the source of the reference clock. In another embodiment, the frequency altering parameter is an age of the source of the reference clock.
In another embodiment, the method includes the addition of a predetermined time delay to the propagation of a transition through a respective signal path such that the propagation time for a transition through the signal path is substantially equal to the propagation time for a transition through a second signal path.